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High-performance C++20 distributed rate limiter using gRPC and Redis. Features a tiered L1/L2 architecture with lock-free SPSC queues and sharded hot-path caching, achieving 180k+ req/s with sub-300ns inter-thread latency.
A circuit-based programming framework and K2 compiler plugin. Writes like idiomatic Kotlin, synthesizes into wait-free, zero-allocation FSMs. Bridging the gap between JVM/Android abstractions and DPDK-tier hardware speeds.
A Java matching engine where one thread owns the book and orders reach it through a lock-free ring. Matching costs 0.73 bytes per command at 20M commands a second, and the raw JMH and HdrHistogram data is committed alongside.
Deep dives into Linux kernel internals for low-latency systems engineering — context switches, page faults, NUMA, and CPU isolation, explained from first principles with original diagrams.