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[nvfp4_training] Optimize CuteDSL kernels for NVFP4 training Run 1xL4 Tests #14360: Pull request #4798 synchronize by rdspring1
Action required rdspring1:nvfp4_moe_cutedsl
rdspring1:nvfp4_moe_cutedsl
Action required
Add generalized int1-int8 weight-only MPS quantization with simdgroup GEMM Run 1xL4 Tests #14359: Pull request #4868 synchronize by mspinelli
Action required mspinelli:mps-minmax-pr
mspinelli:mps-minmax-pr
Action required
Add generalized int1-int8 weight-only MPS quantization with simdgroup GEMM Run 1xL4 Tests #14358: Pull request #4868 opened by mspinelli
Action required mspinelli:mps-minmax-pr
mspinelli:mps-minmax-pr
Action required
[nvfp4_training] Optimize CuteDSL kernels for NVFP4 training Run 1xL4 Tests #14357: Pull request #4798 synchronize by rdspring1
Action required rdspring1:nvfp4_moe_cutedsl
rdspring1:nvfp4_moe_cutedsl
Action required
Warn when Int4WeightOnlyConfig uses the PLAIN packing format Run 1xL4 Tests #14356: Pull request #4867 opened by fletchers16
-1s fletchers16:warn-int4-plain-packing-format-3842
fletchers16:warn-int4-plain-packing-format-3842
-1s
Fix cvt_packfloat compatibility with nvidia-cutlass-dsl 4.6.0+ (#4766) Run 1xL4 Tests #14355: Commit b7ac3aa pushed by andrewor14
18m 21s main
main
18m 21s
Fix cvt_packfloat compatibility with nvidia-cutlass-dsl 4.6.0+ Run 1xL4 Tests #14354: Pull request #4766 synchronize by andrewor14
18m 8s cutlass-cvt-packfloat
cutlass-cvt-packfloat
18m 8s
Honor range-learned scales in the tied embedding quantization path (#… Run 1xL4 Tests #14353: Commit c26119b pushed by meta-codesync Bot
18m 10s main
main
18m 10s
Refactor MXTensor: align the swizzle execution with the configured swizzle setting Run 1xL4 Tests #14352: Pull request #4844 synchronize by xiaowangintel
18m 1s xiaowangintel:xw/mx_logic_refactor
xiaowangintel:xw/mx_logic_refactor
18m 1s
Add opt-in KleidiAI support to BUCK (#4828) Run 1xL4 Tests #14351: Commit 97a9c01 pushed by meta-codesync Bot
18m 6s main
main
18m 6s
Fold away num_batches_tracked when the +1 is a lifted constant (#4834) Run 1xL4 Tests #14350: Commit 7e5f662 pushed by meta-codesync Bot
18m 15s main
main
18m 15s
Fix cvt_packfloat compatibility with nvidia-cutlass-dsl 4.6.0+ Run 1xL4 Tests #14349: Pull request #4766 synchronize by andrewor14
18m 34s cutlass-cvt-packfloat
cutlass-cvt-packfloat
18m 34s
Fix cvt_packfloat compatibility with nvidia-cutlass-dsl 4.6.0+ Run 1xL4 Tests #14348: Pull request #4766 synchronize by andrewor14
3m 35s cutlass-cvt-packfloat
cutlass-cvt-packfloat
3m 35s
Fix cvt_packfloat compatibility with nvidia-cutlass-dsl 4.6.0+ Run 1xL4 Tests #14347: Pull request #4766 synchronize by andrewor14
2m 21s cutlass-cvt-packfloat
cutlass-cvt-packfloat
2m 21s
Fix cvt_packfloat compatibility with nvidia-cutlass-dsl 4.6.0+ Run 1xL4 Tests #14346: Pull request #4766 synchronize by andrewor14
18m 47s cutlass-cvt-packfloat
cutlass-cvt-packfloat
18m 47s
[Draft][xpu] Route per-block FP8 GEMM through torch._scaled_mm on XPU Run 1xL4 Tests #14345: Pull request #4548 reopened by hoshibara
16m 58s hoshibara:xingyuan-per-block-scaled-mm-xpu
hoshibara:xingyuan-per-block-scaled-mm-xpu
16m 58s
[Draft][xpu] Route per-block FP8 GEMM through torch._scaled_mm on XPU Run 1xL4 Tests #14344: Pull request #4548 synchronize by hoshibara
5s hoshibara:xingyuan-per-block-scaled-mm-xpu
hoshibara:xingyuan-per-block-scaled-mm-xpu
5s
Honor range-learned scales in the tied embedding quantization path (#4863) Run 1xL4 Tests #14343: Pull request #4863 synchronize by telgamal-1
18m 12s telgamal-1:export-D118365125
telgamal-1:export-D118365125
18m 12s
Remove Float8 allow-in-graph custom autograd wrappers (#4840) (#4840) Run 1xL4 Tests #14342: Commit ca74881 pushed by huydhn
27m 33s main
main
27m 33s
Honor range-learned scales in the tied embedding quantization path (#4863) Run 1xL4 Tests #14341: Pull request #4863 synchronize by telgamal-1
33m 33s telgamal-1:export-D118365125
telgamal-1:export-D118365125
33m 33s
Honor range-learned scales in the tied embedding quantization path (#4863) Run 1xL4 Tests #14340: Pull request #4863 opened by telgamal-1
14m 52s telgamal-1:export-D118365125
telgamal-1:export-D118365125
14m 52s
Add core support for static Range Quantization (SRQ) and sub-byte embedding optimizations Run 1xL4 Tests #14339: Pull request #4659 synchronize by pculliton
Action required pculliton:gemma-int2-srq-core
pculliton:gemma-int2-srq-core
Action required
Add MoE-safe Int4PlainInt32Tensor op coverage and harden backend/index semantics Run 1xL4 Tests #14338: Pull request #4731 synchronize by eryk-roch
Action required eryk-roch:add-grouped-mm-int4
eryk-roch:add-grouped-mm-int4
Action required
Add MoE-safe Int4PlainInt32Tensor op coverage and harden backend/index semantics Run 1xL4 Tests #14337: Pull request #4731 synchronize by eryk-roch
Action required eryk-roch:add-grouped-mm-int4
eryk-roch:add-grouped-mm-int4
Action required
Fix MXFP8 quantize failing when it is the first CUDA call on a thread… Run 1xL4 Tests #14336: Commit a195aaf pushed by vkuzo
22m 0s main
main
22m 0s