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Improve RSP accuracy by backporting changes from simple64#1153

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Rosalie241:simple64-rsp-backport
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Improve RSP accuracy by backporting changes from simple64#1153
Rosalie241 wants to merge 3 commits into
mupen64plus:masterfrom
Rosalie241:simple64-rsp-backport

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@Rosalie241

@Rosalie241 Rosalie241 commented Sep 26, 2025

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This fixes all RSP tests with the interpreter, a LLE video plugin & parallel RSP:

[CORE]  IS64: n64-systemtest 2.1.0 (base=1 timing=0 cycle=0 cp0-hazards=0)
[CORE]  IS64: Finished in 4.28s. Base: Failed 0 of 305 tests (100% success rate)
[CORE]  IS64: 
[CORE]  IS64: Slowest tests: RSP VRSQ (all 16 bit values) (0.25s), RSP VRCP (all 16 bit values) (0.24s), RSP VLT (0.09s), RSP VGE (0.09s), RSP VADD (0.09s)

n64-systemtest-rsp.zip

This also requires a parallel-rsp patch: libretro/parallel-rsp#17

@Morilli Morilli mentioned this pull request May 30, 2026
LibretroAdmin added a commit to libretro/parallel-n64 that referenced this pull request Jun 9, 2026
Backports the RSP accuracy improvements from libretro/parallel-rsp#17
(by Rosalie241, originally from simple64) into the vendored
mupen64plus-rsp-paraLLEl.

  - rsp_dma_read/rsp_dma_write: rewrite length/count/skip handling
    (length = ((len & 0xFFF) | 7) + 1, skip masked 0xFF8, count + 1,
    DMA_CACHE & 0x1ff8, DMA_DRAM & 0xfffff8, loop ++i < count).
  - SP_STATUS write: per-bit SP_SET_/SP_CLR_ handling.
  - DPC register logic: rdp_status_write(), CMD_START/CMD_END with
    DPC_STATUS_START_VALID, semaphore-write-zeros.
  - Replace the MFC0_count timeout mechanism with the SP_SEMAPHORE
    path; add a MODE_EXIT run-loop exit (parallel.cpp / rsp_jit.cpp).

Passes all 305 n64-systemtest RSP tests (interpreter, LLE video,
parallel RSP), per the upstream PR.

The local rsp_jit.cpp uint16_t(imm) immediate fix is preserved.

NOTE: the upstream PR also wants a companion mupen64plus-core change
(mupen64plus/mupen64plus-core#1153). The parallel-n64 core may need a
matching adjustment for the new DPC START_VALID / CMD handshake.
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