PE/PA bit operands: add bit access support#39
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Add 1-bit operand descriptors for direct peripheral input and output areas so bit instructions can parse PE/PA operands alongside the existing PEB/PEW/PED and PAB/PAW/PAD forms. Also add the English PI/PQ aliases to keep bit operands consistent with the existing PIB/PIW/PID and PQB/PQW/PQD aliases.
The direct peripheral hardware callback API accepts a byte offset and an access width, but no bit offset. For PE/PA bit operands, route hardware access as an 8-bit access at the operand byte offset, then extract or update the addressed bit in the CPU process image. PE bit reads now refresh the process-image byte when direct hardware returns data, then return the requested bit. PA bit stores update the process-image bit first, then write the resulting byte to hardware so neighboring bits are preserved. PA bit stores outside the output process image are rejected because the current hardware API cannot read-modify-write an isolated peripheral output bit without a backing byte image.
Cover PE bit process-image fallback, PA bit process-image preservation, and direct hardware PE/PA bit access. The hardware-facing test uses a temporary module that requires byte-wide direct access, which catches regressions that pass width 1 to the hardware API. The direct hardware test also exercises English PI/PQ bit aliases under English mnemonics.
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Thanks for your contribution. Peripheral bit access was left out because I thought it doesn't exist on the real S7 hardware. |
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Adds PE/PA and PI/PQ bit operand parsing and byte-backed peripheral bit access, with regression coverage.
Validated locally:
Rollback: close the PR before merge, or revert the three commits after merge.