Clock pll

PLL's

Wondermedia processors have several PLL's driven from an oscillator. These provide clocks for the arm processor, ahb bus and peripherals.

WM8505

bits	function
19:18	VCO Range Value bits (always write 0)
17:16	Charge-pump Range Value bits (always write 0)
8	Pre-Divisor Bypass (0=divide by 2, 1=bypass)
4:0	Multiplier (0..3 = bypass, otherwise value*2)

To calculate the PLL frequency on the WM8505, use the following formula:

pre_div = (reg_val & 0x100) ? 1 : 2

freq = (OSC / pre_div) * (reg_val & 0x1F)

WM8650

bits	function
14:13	Shifted Divider
12:10	Divider
9:0	Multiplier (unknown which values are invalid)

To calculate the PLL frequency on the WM8650, use the following formula:

freq = (OSC * (reg_val & 0x3FF)) / (((reg_val >> 10) & 7) * ((1 << ((reg_val >> 13) & 3)))

WM8750

bits	function
31:24	Filter
23:16	Multiplier
8	Divider
2:0	Shifted Divider

To calculate the PLL frequency on the WM8750, use the following formula:

freq = (OSC * ((reg_val >> 16) & 0xFF)) / ((((reg_val >> 8) & 1) + 1) * (1 << (reg_val & 7)))

WM8850

bits	function
31:23	Reserved (always write 0)
22:16	Multiplier
8	Divider
2:0	Shifted Divider

To calculate the PLL frequency on the WM8850, use the following formula:

freq = (OSC * 2 * (((reg_val >> 16) & 0xFF) + 1)) / ((((reg_val >> 8) & 1) + 1) * (1 << (reg_val & 7)))