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3 changes: 3 additions & 0 deletions sparse_strips/vello_bench/src/coarse.rs
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,7 @@ pub fn coarse(c: &mut Criterion) {
0,
None,
&[],
false,
);
std::hint::black_box(&wide);
});
Expand Down Expand Up @@ -93,6 +94,7 @@ pub fn coarse_with_layer(c: &mut Criterion) {
0,
None,
&[],
false,
);

// Pop all layers
Expand Down Expand Up @@ -167,6 +169,7 @@ pub fn coarse_with_layer_large_viewport(c: &mut Criterion) {
0,
None,
&[],
false,
);

// Pop all layers
Expand Down
1 change: 1 addition & 0 deletions sparse_strips/vello_bench/src/fine/fill.rs
Original file line number Diff line number Diff line change
Expand Up @@ -68,6 +68,7 @@ pub(crate) fn fill_single<S: Simd, N: FineKernel<S>>(
&NoOpImageResolver,
None,
None,
false,
);

std::hint::black_box(&fine);
Expand Down
1 change: 1 addition & 0 deletions sparse_strips/vello_bench/src/fine/strip.rs
Original file line number Diff line number Diff line change
Expand Up @@ -60,6 +60,7 @@ fn strip_single<S: Simd, N: FineKernel<S>>(
&NoOpImageResolver,
Some(&alphas),
None,
false,
);

std::hint::black_box(&fine);
Expand Down
6 changes: 6 additions & 0 deletions sparse_strips/vello_common/src/coarse.rs
Original file line number Diff line number Diff line change
Expand Up @@ -502,6 +502,7 @@ impl<const MODE: u8> Wide<MODE> {
thread_idx: u8,
mask: Option<Mask>,
encoded_paints: &[EncodedPaint],
gamma_correction: bool,
) {
if strip_buf.is_empty() {
return;
Expand All @@ -516,6 +517,7 @@ impl<const MODE: u8> Wide<MODE> {
thread_idx,
paint,
blend_mode,
gamma_correction,
mask,
alpha_base_idx,
});
Expand Down Expand Up @@ -2044,6 +2046,8 @@ pub struct FillAttrs {
pub paint: Paint,
/// The blend mode to apply before drawing the contents.
pub blend_mode: BlendMode,
/// Whether to use gamma-corrected compositing for solid color fills.
pub gamma_correction: bool,
/// A mask to apply to the command.
pub mask: Option<Mask>,
/// Base index into the alpha buffer for this path's commands.
Expand Down Expand Up @@ -2348,6 +2352,7 @@ mod tests {
0,
None,
&[],
false,
);
assert!(wide.tiles_dirty);

Expand Down Expand Up @@ -2384,6 +2389,7 @@ mod tests {
0,
None,
&[],
false,
);
assert!(!wide.tiles_dirty);
}
Expand Down
3 changes: 3 additions & 0 deletions sparse_strips/vello_cpu/src/dispatch/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,7 @@ pub(crate) trait Dispatcher: Debug + Send + Sync {
aliasing_threshold: Option<u8>,
mask: Option<Mask>,
encoded_paints: &[EncodedPaint],
gamma_correction: bool,
);
fn stroke_path(
&mut self,
Expand All @@ -48,6 +49,7 @@ pub(crate) trait Dispatcher: Debug + Send + Sync {
aliasing_threshold: Option<u8>,
mask: Option<Mask>,
encoded_paints: &[EncodedPaint],
gamma_correction: bool,
);
/// Fill a pixel-aligned rectangle with the current paint.
fn fill_rect_fast(
Expand All @@ -57,6 +59,7 @@ pub(crate) trait Dispatcher: Debug + Send + Sync {
blend_mode: BlendMode,
mask: Option<Mask>,
encoded_paints: &[EncodedPaint],
gamma_correction: bool,
);
fn push_clip_path(
&mut self,
Expand Down
13 changes: 13 additions & 0 deletions sparse_strips/vello_cpu/src/dispatch/multi_threaded.rs
Original file line number Diff line number Diff line change
Expand Up @@ -308,6 +308,7 @@ impl MultiThreadedDispatcher {
blend_mode,
thread_id,
mask,
gamma_correction,
} => self.wide.generate(
&task.allocation_group.strips
[strip_range.start as usize..strip_range.end as usize],
Expand All @@ -316,6 +317,7 @@ impl MultiThreadedDispatcher {
thread_id,
mask,
encoded_paints,
gamma_correction,
),
CoarseTaskType::RenderWideCommand {
strips,
Expand All @@ -330,6 +332,7 @@ impl MultiThreadedDispatcher {
thread_id,
mask,
encoded_paints,
false,
),
CoarseTaskType::PushLayer {
thread_id,
Expand Down Expand Up @@ -441,6 +444,7 @@ impl Dispatcher for MultiThreadedDispatcher {
aliasing_threshold: Option<u8>,
mask: Option<Mask>,
_encoded_paints: &[EncodedPaint],
gamma_correction: bool,
) {
let start = self.allocation_group.path.len() as u32;
self.allocation_group.path.extend(path);
Expand All @@ -453,6 +457,7 @@ impl Dispatcher for MultiThreadedDispatcher {
blend_mode,
aliasing_threshold,
mask,
gamma_correction,
});
}

Expand All @@ -466,6 +471,7 @@ impl Dispatcher for MultiThreadedDispatcher {
aliasing_threshold: Option<u8>,
mask: Option<Mask>,
_encoded_paints: &[EncodedPaint],
gamma_correction: bool,
) {
let start = self.allocation_group.path.len() as u32;
self.allocation_group.path.extend(path);
Expand All @@ -478,6 +484,7 @@ impl Dispatcher for MultiThreadedDispatcher {
blend_mode,
aliasing_threshold,
mask,
gamma_correction,
});
}

Expand All @@ -488,6 +495,7 @@ impl Dispatcher for MultiThreadedDispatcher {
blend_mode: BlendMode,
mask: Option<Mask>,
_encoded_paints: &[EncodedPaint],
gamma_correction: bool,
) {
// For multi-threaded, fall back to path-based rendering.
// TODO: Implement optimized rect strip generation in worker threads.
Expand All @@ -508,6 +516,7 @@ impl Dispatcher for MultiThreadedDispatcher {
blend_mode,
aliasing_threshold: None,
mask,
gamma_correction,
});
}

Expand Down Expand Up @@ -834,6 +843,7 @@ pub(crate) enum RenderTaskType {
blend_mode: BlendMode,
aliasing_threshold: Option<u8>,
mask: Option<Mask>,
gamma_correction: bool,
},
WideCommand {
strip_buf: Box<[Strip]>,
Expand All @@ -849,6 +859,7 @@ pub(crate) enum RenderTaskType {
blend_mode: BlendMode,
aliasing_threshold: Option<u8>,
mask: Option<Mask>,
gamma_correction: bool,
},
PushLayer {
clip_path: Option<(Range<u32>, Affine)>,
Expand All @@ -873,6 +884,7 @@ pub(crate) enum CoarseTaskType {
blend_mode: BlendMode,
paint: Paint,
mask: Option<Mask>,
gamma_correction: bool,
},
RenderWideCommand {
thread_id: u8,
Expand Down Expand Up @@ -959,6 +971,7 @@ mod tests {
None,
None,
&[],
false,
);
dispatcher.flush(&[]);
}
Expand Down
4 changes: 4 additions & 0 deletions sparse_strips/vello_cpu/src/dispatch/multi_threaded/worker.rs
Original file line number Diff line number Diff line change
Expand Up @@ -70,6 +70,7 @@ impl Worker {
blend_mode,
aliasing_threshold,
mask,
gamma_correction,
} => {
let start = self.strip_storage.strips.len() as u32;
let path = &render_task.allocation_group.path
Expand All @@ -91,6 +92,7 @@ impl Worker {
blend_mode,
paint,
mask,
gamma_correction,
};

render_task
Expand All @@ -106,6 +108,7 @@ impl Worker {
stroke,
aliasing_threshold,
mask,
gamma_correction,
} => {
let start = self.strip_storage.strips.len() as u32;
let path = &render_task.allocation_group.path
Expand All @@ -127,6 +130,7 @@ impl Worker {
blend_mode,
paint,
mask,
gamma_correction,
};

render_task
Expand Down
30 changes: 11 additions & 19 deletions sparse_strips/vello_cpu/src/dispatch/single_threaded.rs
Original file line number Diff line number Diff line change
Expand Up @@ -539,6 +539,7 @@ impl Dispatcher for SingleThreadedDispatcher {
aliasing_threshold: Option<u8>,
mask: Option<Mask>,
encoded_paints: &[EncodedPaint],
gamma_correction: bool,
) {
let wide = &mut self.wide;

Expand All @@ -560,6 +561,7 @@ impl Dispatcher for SingleThreadedDispatcher {
0,
mask,
encoded_paints,
gamma_correction,
);
}

Expand All @@ -573,6 +575,7 @@ impl Dispatcher for SingleThreadedDispatcher {
aliasing_threshold: Option<u8>,
mask: Option<Mask>,
encoded_paints: &[EncodedPaint],
gamma_correction: bool,
) {
let wide = &mut self.wide;

Expand All @@ -594,6 +597,7 @@ impl Dispatcher for SingleThreadedDispatcher {
0,
mask,
encoded_paints,
gamma_correction,
);
}

Expand All @@ -604,6 +608,7 @@ impl Dispatcher for SingleThreadedDispatcher {
blend_mode: BlendMode,
mask: Option<Mask>,
encoded_paints: &[EncodedPaint],
gamma_correction: bool,
) {
let wide = &mut self.wide;

Expand All @@ -622,6 +627,7 @@ impl Dispatcher for SingleThreadedDispatcher {
0,
mask,
encoded_paints,
gamma_correction,
);
}

Expand Down Expand Up @@ -738,14 +744,7 @@ impl Dispatcher for SingleThreadedDispatcher {
{
// This case never gets hit because there is a compile_error in the root.
// But have this code disables some warnings and makes the compile error easier to read
let _ = (
buffer,
render_mode,
width,
height,
encoded_paints,
image_resolver,
);
let _ = (buffer, render_mode, width, height, encoded_paints, image_resolver);
}
}

Expand Down Expand Up @@ -827,16 +826,8 @@ impl Dispatcher for SingleThreadedDispatcher {
#[cfg(all(not(feature = "u8_pipeline"), not(feature = "f32_pipeline")))]
{
let _ = (
buffer,
width,
height,
dst_x,
dst_y,
dst_buffer_width,
dst_buffer_height,
render_mode,
encoded_paints,
image_resolver,
buffer, width, height, dst_x, dst_y, dst_buffer_width, dst_buffer_height,
render_mode, encoded_paints, image_resolver,
);
}
}
Expand All @@ -850,7 +841,7 @@ impl Dispatcher for SingleThreadedDispatcher {
) {
// Generate coarse-level commands from pre-computed strips (thread_idx 0 for single-threaded).
self.wide
.generate(strip_buf, paint, blend_mode, 0, None, encoded_paints);
.generate(strip_buf, paint, blend_mode, 0, None, encoded_paints, false);
}

fn strip_storage_mut(&mut self) -> &mut StripStorage {
Expand Down Expand Up @@ -927,6 +918,7 @@ mod tests {
None,
None,
&[],
false,
);

// Ensure there is data to clear.
Expand Down
18 changes: 13 additions & 5 deletions sparse_strips/vello_cpu/src/fine/highp/blend.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,19 +6,27 @@ use crate::util::Premultiply;
use vello_common::fearless_simd::*;

#[derive(Copy, Clone)]
struct Channels<S: Simd> {
r: f32x4<S>,
g: f32x4<S>,
b: f32x4<S>,
pub(crate) struct Channels<S: Simd> {
pub(crate) r: f32x4<S>,
pub(crate) g: f32x4<S>,
pub(crate) b: f32x4<S>,
}

impl<S: Simd> Channels<S> {
#[inline(always)]
fn unpremultiply(mut self, a: f32x4<S>) -> Self {
pub(crate) fn unpremultiply(mut self, a: f32x4<S>) -> Self {
self.r = self.r.unpremultiply(a);
self.g = self.g.unpremultiply(a);
self.b = self.b.unpremultiply(a);

self
}
#[inline(always)]
pub(crate) fn square(mut self) -> Self {
self.r *= self.r;
self.g *= self.g;
self.b *= self.b;

self
}
}
Expand Down
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