BEAMZ is a GPU-accelerated electromagnetic simulation framework for photonic chip designers using the FDTD method. It enables fast, large-scale simulations and offers a familiar, high-level API for fast prototyping with just a few lines of code as well as an inverse design module for gradient-based optimization using the adjoint method.
- 100% Python, free (Apache-2.0 license) & open-source.
- FDTD simulation in 2D and 3D.
- GPU-accelerated, achieving high GCUPS performance.
- Multi-GPU runs, handling large-scale simulations with billions of cells.
- CPU-capable for fast prototyping, even on your laptop.
- Modular architecture with an intuitive and familiar, high-level API.
- Native FDFD mode solver, micromode.
- CPML, absorbing layers and PEC boundaries.
- Mode and other sources with TE and TM polarization.
- Integrated rasterization module.
- Sub-pixel averaging using super-sampling.
- Custom source time profiles.
- Built-in layout flow (GDSII import/export).
- DFT monitors and S-parameter extraction workflow for compact modeling.
- Streamlined parametric design module and interactive 3D web-view.
- Optimization/autodiff utilities for gradient-based inverse-design with Jax.
Try out notebooks from our growing example library.
Get started with
pip install beamzBEAMZ's mission is to be the pragmatic FDTD engine of choice for photonic chip designers.
It focuses on streamlined workflows to produce useful results without tedious setup or configuration files and bringing GPU-acceleration for maximum performance in large-scale simulations to everyone. The project is actively maintained and this is not a research project with the goal to demo a novel framework we can publish, nor a costly, closed API that hides how it works and gives you no ownership. A modular architecture is chosen over a purely object-oriented architecture to make the code readable and development easy so that - if there is something that isn't working or missing - you can quickly add it yourself. The engine is grounded in hundreds of tests, verifiable simulations and benchmarks, replicating known results from the established literature. Rather than just benchmarking for impressive engine stats, we aim to reduce friction for chip designers at every step - from installation, to setting up the sim using a familiar API, to optimizing the performance of the rasterizer, mode solver, compiler, the core engine, optimization loop, and integration into the overall chip design workflow.
If any of this excites you or if have any questions, please open an issue on GitHub. Feel free to fork this project, to suggest or contribute new features, or simply support the project by giving this repo a star. Thank you!
Copyright © 2026 Quentin Wach — Apache-2.0