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3 | 3 | // REQUIRES: cuda |
4 | 4 |
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5 | 5 | // clang-format off |
6 | | -// LLVM: call i32 @cudaMallocAsync(ptr {{.*}}[[CU_POINTER_X:%[_0-9a-z]+]], i64 {{.*}}80, ptr {{.*}}) |
| 6 | +// LLVM: [[RET_X:%[0-9a-z_]+]] = call i32 @cudaMallocAsync(ptr {{.*}}[[CU_POINTER_X:%[_0-9a-z]+]], i64 {{.*}}80, ptr {{.*}}) |
| 7 | +// LLVM-NEXT: [[SUCCESS_X:%[0-9a-z_]+]] = icmp eq i32 [[RET_X]], 0 |
| 8 | +// LLVM-NEXT: br i1 [[SUCCESS_X]], label %[[LABEL_X:[0-9a-z_.]+]], label %[[SKIP_X:[0-9a-z_.]+]] |
| 9 | +// LLVM: [[LABEL_X]]: |
7 | 10 | // LLVM-NEXT: [[CUDA_PTR_X:%[0-9a-z_]+]] = load ptr, ptr [[CU_POINTER_X]] |
8 | 11 | // LLVM-NEXT: call void @__typeart_alloc_gpu(ptr [[CUDA_PTR_X]], i32 23, i64 20) |
9 | 12 |
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10 | | -// LLVM: call i32 @cudaMallocFromPoolAsync(ptr {{.*}}[[CU_POINTER_Y:%[_0-9a-z]+]], i64 {{.*}}80, ptr {{.*}}, ptr {{.*}}) |
| 13 | +// LLVM: [[RET_Y:%[0-9a-z_]+]] = call i32 @cudaMallocFromPoolAsync(ptr {{.*}}[[CU_POINTER_Y:%[_0-9a-z]+]], i64 {{.*}}80, ptr {{.*}}, ptr {{.*}}) |
| 14 | +// LLVM-NEXT: [[SUCCESS_Y:%[0-9a-z_]+]] = icmp eq i32 [[RET_Y]], 0 |
| 15 | +// LLVM-NEXT: br i1 [[SUCCESS_Y]], label %[[LABEL_Y:[0-9a-z_.]+]], label %[[SKIP_Y:[0-9a-z_.]+]] |
| 16 | +// LLVM: [[LABEL_Y]]: |
11 | 17 | // LLVM-NEXT: [[CUDA_PTR_Y:%[0-9a-z_]+]] = load ptr, ptr [[CU_POINTER_Y]] |
12 | 18 | // LLVM-NEXT: call void @__typeart_alloc_gpu(ptr [[CUDA_PTR_Y]], i32 23, i64 20) |
13 | 19 |
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14 | | -// LLVM_LEGACY: [[CAST1:%[0-9a-z_]+]] = bitcast float** [[SRC_VAR:%[0-9a-zA-Z_]+]] to i8** |
15 | | -// LLVM_LEGACY: call i32 @cudaMallocAsync(i8** {{.*}}[[CU_POINTER_X:%[_0-9a-z]+]], i64 {{.*}}80, |
16 | | -// LLVM_LEGACY: [[CAST2:%[0-9a-z_]+]] = bitcast float** [[SRC_VAR]] to i8** |
17 | | -// LLVM_LEGACY: [[LOADED_PTR:%[0-9a-z_]+]] = load i8*, i8** [[CAST2]] |
18 | | -// LLVM_LEGACY: call void @__typeart_alloc_gpu(i8* [[LOADED_PTR]], i32 23, i64 20) |
19 | | - |
20 | | -// LLVM_LEGACY: [[CAST1:%[0-9a-z_]+]] = bitcast float** [[SRC_VAR:%[0-9a-zA-Z_]+]] to i8** |
21 | | -// LLVM_LEGACY: call i32 @cudaMallocFromPoolAsync(i8** {{.*}}[[CU_POINTER_Y:%[_0-9a-z]+]], i64 {{.*}}80, |
22 | | -// LLVM_LEGACY: [[CAST2:%[0-9a-z_]+]] = bitcast float** [[SRC_VAR]] to i8** |
23 | | -// LLVM_LEGACY: [[LOADED_PTR:%[0-9a-z_]+]] = load i8*, i8** [[CAST2]] |
24 | | -// LLVM_LEGACY: call void @__typeart_alloc_gpu(i8* [[LOADED_PTR]], i32 23, i64 20) |
| 20 | +// LLVM_LEGACY: [[RET_X:%[0-9a-z_]+]] = call i32 @cudaMallocAsync(i8** {{.*}}[[CU_POINTER_X:%[_0-9a-z]+]], i64 {{.*}}80, |
| 21 | +// LLVM_LEGACY-NEXT: [[SUCCESS_X:%[0-9a-z_]+]] = icmp eq i32 [[RET_X]], 0 |
| 22 | +// LLVM_LEGACY-NEXT: br i1 [[SUCCESS_X]], label %[[LABEL_X:[0-9a-z_.]+]], label %[[SKIP_X:[0-9a-z_.]+]] |
| 23 | +// LLVM_LEGACY: [[LABEL_X]]: |
| 24 | +// LLVM_LEGACY-NEXT: [[CAST2_X:%[0-9a-z_]+]] = bitcast float** [[SRC_VAR_X:%[0-9a-zA-Z_]+]] to i8** |
| 25 | +// LLVM_LEGACY-NEXT: [[LOADED_PTR_X:%[0-9a-z_]+]] = load i8*, i8** [[CAST2_X]] |
| 26 | +// LLVM_LEGACY-NEXT: call void @__typeart_alloc_gpu(i8* [[LOADED_PTR_X]], i32 23, i64 20) |
| 27 | + |
| 28 | +// LLVM_LEGACY: [[RET_Y:%[0-9a-z_]+]] = call i32 @cudaMallocFromPoolAsync(i8** {{.*}}[[CU_POINTER_Y:%[_0-9a-z]+]], i64 {{.*}}80, |
| 29 | +// LLVM_LEGACY-NEXT: [[SUCCESS_Y:%[0-9a-z_]+]] = icmp eq i32 [[RET_Y]], 0 |
| 30 | +// LLVM_LEGACY-NEXT: br i1 [[SUCCESS_Y]], label %[[LABEL_Y:[0-9a-z_.]+]], label %[[SKIP_Y:[0-9a-z_.]+]] |
| 31 | +// LLVM_LEGACY: [[LABEL_Y]]: |
| 32 | +// LLVM_LEGACY-NEXT: [[CAST2_Y:%[0-9a-z_]+]] = bitcast float** [[SRC_VAR_Y:%[0-9a-zA-Z_]+]] to i8** |
| 33 | +// LLVM_LEGACY-NEXT: [[LOADED_PTR_Y:%[0-9a-z_]+]] = load i8*, i8** [[CAST2_Y]] |
| 34 | +// LLVM_LEGACY-NEXT: call void @__typeart_alloc_gpu(i8* [[LOADED_PTR_Y]], i32 23, i64 20) |
25 | 35 | // clang-format on |
26 | 36 |
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27 | 37 | int main() { |
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