Commit b669575
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[mxfp8 moe training] add fused dim0+dim1 mxfp8 quantize kernel for backward pass
Adds ``triton_mxfp8_quantize_dim0_dim1`` (new file
``kernels/mxfp8/triton_grad_quantize.py``): a single-pass Triton kernel that
reads the bf16 ``grad_out`` tile once and emits four outputs in one launch:
* ``qdata_dim0`` - ``(M, N)`` e4m3 row-major, rowwise scales along N
* ``qdata_dim1_t``- ``(N, M)`` e4m3 row-major (logical transpose of the
colwise-quantized tile), colwise scales along M
* both e8m0 scale tensors already in the tcgen05 blocked layout
(``triton_mx_block_rearrange`` output, no separate rearrange pass needed)
Replaces the current backward-pass sequence of ``triton_to_mxfp8_dim0 +
triton_to_mxfp8_dim1 + 2x triton_mx_block_rearrange_2d_M_groups`` (four
Triton launches, bf16 read twice, scale tensor written twice).
Key implementation points:
* Single bf16 tile load; both rowwise and colwise scales are computed via
pure 3D reshapes of the SAME tile (no bf16 transpose).
* No ``tl.trans`` on fp8 either: the dim1 output is stored with
``offset = n * M + m`` directly on the (BLOCK_M, BLOCK_N) tile, matching
how the existing ``to_mxfp8_dim1_kernel`` handles its col-major write.
* Scales are emitted directly in tcgen05 blocked layout by computing the
``(r % 32) * 16 + (r // 32) * 4 + c`` super-tile offset for every scale
element and issuing one ``tl.store`` per scale tensor.
* Autotuned over BLOCK_N in {128, 256, 512} x num_warps in {4, 8, 16} x
num_stages in {2, 3, 4} with an ``early_config_prune`` that drops
configs where BLOCK_N > N.
Numerics: new ``test_triton_mxfp8_quantize_dim0_dim1_numerics`` parametrized
over 7 shapes x {rceil, floor} asserts bit-exact parity of both fp8 data
tensors and both blocked scales against the 4-kernel reference pipeline.
14/14 pass on B200 (SM 10.0).
Benchmark (``bench_triton_grad_quantize.py``; do_bench median, B200, rceil):
M N 4k_us fused_us 4k_GB/s fused_GB/s speedup
16384 2048 340.0 120.9 401 1128 2.81x
4096 2048 271.8 39.0 125 873 6.96x
8192 2048 291.4 65.6 234 1038 4.44x
32768 2048 451.5 233.5 604 1167 1.93x
16384 5120 459.6 292.8 742 1164 1.57x
16384 7168 547.8 405.5 871 1177 1.35x
8192 5120 358.4 151.6 475 1124 2.36x
8192 7168 394.2 209.9 605 1136 1.88x
32768 5120 761.7 574.6 895 1186 1.33x
v1 lands ~1.1-1.2 TB/s (~20-32% of B200 bf16 memcpy, which measures
~5 TB/s on this rig). That is a consistent 1.33-6.96x over the 4-kernel
baseline but still short of the "90% memcpy BW" bar -- the kernel is
correct and drop-in-compatible, and the remaining headroom is in TMA /
warp-specialized stores which are worth their own follow-up diff.
Made-with: Cursor1 parent 77da665 commit b669575
4 files changed
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- benchmarks/prototype/moe_training/mxfp8
- test/prototype/moe_training
- torchao/prototype/moe_training/kernels/mxfp8
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