Merge pull request #5 from meiniKi/dev

Updates flows, ci, small fixes

Author: meiniKi

.github/workflows/impl.yml

@@ -17,7 +17,7 @@ jobs:
 
       - uses: actions/setup-python@v5
         with:
-          python-version: '3.10'
+          python-version: '3.12'
           cache: 'pip'
 
       - name: pip packages
@@ -30,8 +30,8 @@ jobs:
 
       - name: Run implementation
         run: |
-          make report.soc.all TARGET_ARCH=ice40
-          make report.md TARGET_ARCH=ice40 >> $GITHUB_STEP_SUMMARY
+          make summary.soc.all TARGET_ARCH=ice40
+          cat work/soc_ice40.md >> $GITHUB_STEP_SUMMARY
 
   impl_ecp5:
     name: ECP5 Reference Implementation
@@ -47,7 +47,7 @@ jobs:
 
       - uses: actions/setup-python@v5
         with:
-          python-version: '3.10'
+          python-version: '3.12'
           cache: 'pip'
 
       - name: pip packages
@@ -60,6 +60,5 @@ jobs:
 
       - name: Run implementation
         run: |
-          make report.soc.all TARGET_ARCH=ecp5
-          make report.md TARGET_ARCH=ecp5 >> $GITHUB_STEP_SUMMARY
-
+          make summary.soc.all TARGET_ARCH=ecp5
+          cat work/soc_ecp5.md >> $GITHUB_STEP_SUMMARY

.github/workflows/track_area.yml

@@ -22,22 +22,22 @@ jobs:
 
       - uses: actions/setup-python@v5
         with:
-          python-version: '3.10'
+          python-version: '3.12'
           cache: 'pip'
 
       - name: pip packages
         run: pip install -r requirements.txt
 
+      - name: Actions checkout
+        uses: actions/checkout@v3
+
       - name: fusesoc library
         run: |
           fusesoc library add fazyrv .
           fusesoc library add fsoc .
 
-      - name: Actions checkout
-        uses: actions/checkout@v3
-
       - name: Run implementation
-        run: make track.sizes.synth COMMIT=$(git rev-parse --short "$GITHUB_SHA")
+        run: make track.sizes COMMIT=$(git rev-parse --short "$GITHUB_SHA")
 
       - name: Plot artifact
         uses: actions/upload-artifact@v4

.github/workflows/verif.yml

@@ -1,6 +1,6 @@
 name: Verification
 
-on: [push, pull_request]
+on: [pull_request]
 
 jobs:
   rvtests:
@@ -34,7 +34,7 @@ jobs:
 
     - uses: actions/setup-python@v5
       with:
-        python-version: '3.10'
+        python-version: '3.12'
         cache: 'pip'
 
     - name: pip packages

Makefile

@@ -1,30 +1,25 @@
 
 CUR_DIR := $(shell pwd)
 SCRIPT := $(CUR_DIR)/script
-WORKFLOW_SCRIPT := $(SCRIPT)/workflow
 
 YOSYS := yosys
 SVLINT := svlint
 SLANG := slang
-PYTHON := python3
+PYTHON := python
 MAKE := make
 BASH := bash
 VERILATOR := verilator
 
-NEXTPNR_ICE40 := nextpnr-ice40
-NEXTPNR_ECP5 := nextpnr-ecp5
-NEXTPNR_GOWIN := nextpnr-gowin
-GATEMATE_PR := p_r
-
 TARGET_ARCH ?= ice40
+COMMIT ?= n/a
 
 ################################
 # Synthesis combinations 
 #
 
 SYNTH_CHUNKSIZES 	:= 1 2 4 8
-SYNTH_CONFS 		:= MIN INT
-SYNTH_RF 			:= BRAM BRAM_BP BRAM_DP BRAM_DP_BP
+SYNTH_CONFS 		:= MIN
+SYNTH_RF 			:= LOGIC BRAM BRAM_BP BRAM_DP BRAM_DP_BP
 
 # Synth param:  <CHUNKSIZE>-<CONF>-<RFTYPE>
 SYNTH_PARAMS := $(foreach bdwidth,$(SYNTH_CHUNKSIZES),\
@@ -81,10 +76,8 @@ TOP_MODULE_TOP := fazyrv_top
 
 WORK_DIR_MAIN		:= work
 
-WORK_DIR_TOP		:= $(WORK_DIR_MAIN)/work_top
 WORK_DIR_CORE		:= $(WORK_DIR_MAIN)/work_core
 WORK_DIR_SOC		:= $(WORK_DIR_MAIN)/work_soc
-WORK_DIR_EMBENCH	:= $(WORK_DIR_MAIN)/work_rvtests
 WORK_DIR_RISCOF		:= $(WORK_DIR_MAIN)/work_riscof
 
 SUMMARY_DIR_SOC			:= $(WORK_DIR_MAIN)/summary_fsoc_soc
@@ -139,7 +132,7 @@ sim.riscvtests.%: $(SRC_DESIGN) $(SRC_SYNTH)
 
 report.riscvtests.all: $(addprefix sim.riscvtests., $(RVTESTS_PARAMS))
 	@echo "${BLUE}Generating riscvtests table for all combinations${RESET}"
-	$(WORKFLOW_SCRIPT)/rvtests_table.sh $(SUMMARY_DIR_RISCVTESTS)
+	$(SCRIPT)/rvtests_table.sh $(SUMMARY_DIR_RISCVTESTS)
 
 
 ################
@@ -267,8 +260,7 @@ embench.run: embench.prepare
 #
 
 # param: <ARCH>-<CHUNKSIZE>-<CONF>-<RFTYPE>
-# Via fusesoc whenever possible.
-_impl.soc.%: $(SRC_DESIGN) $(SRC_SYNTH)
+impl.soc.%:
 	@echo "${BLUE}Synthesizing for $*...${RESET}"
 	$(eval ARCH=$(word 1,$(subst -, ,$*)))
 	$(eval CHUNKSIZE=$(word 2,$(subst -, ,$*)))
@@ -278,71 +270,37 @@ _impl.soc.%: $(SRC_DESIGN) $(SRC_SYNTH)
 	@echo "ARCH: $(ARCH)"
 	@echo "CONF: $(CONF)"
 	@echo "RF: $(RF)"
-	mkdir -p $(WORK_DIR_SOC)/$*
-	@case ${ARCH} in \
-		gatemate) $(YOSYS) -l $(WORK_DIR_SOC)/$*/yosys_$*.log -p "read_verilog -sv -defer $^; chparam -set CHUNKSIZE $(CHUNKSIZE) $(TOP_MODULE_SOC); chparam -set GPOCNT 1 $(TOP_MODULE_SOC); chparam -set MEMDLY1 0 $(TOP_MODULE_SOC); chparam -set CONF \"$(CONF)\" $(TOP_MODULE_SOC); chparam -set RFTYPE \"$(RF)\" $(TOP_MODULE_SOC); synth_$(ARCH) -top $(TOP_MODULE_SOC); synth_$(ARCH) -top $(TOP_MODULE_SOC) -json $(WORK_DIR_SOC)/$*/$*.json -vlog $(WORK_DIR_SOC)/$*/$*.v" && \
-					$(GATEMATE_PR) --speed 10 -tm 2 -ccf soc/synth/gatemate_ref.ccf -i $(WORK_DIR_SOC)/$*/$*.v > $(WORK_DIR_SOC)/$*/gm_pr_$*.log ;; \
-		gowin) fusesoc run --target=$(ARCH)_ref --build --work-root=$(WORK_DIR_SOC)/$* fsoc --CHUNKSIZE=$(CHUNKSIZE) --CONF=$(CONF) --RFTYPE=$(RF) --GOWIN ;; \
-		*) fusesoc run --target=$(ARCH)_ref --build --work-root=$(WORK_DIR_SOC)/$* fsoc --CHUNKSIZE=$(CHUNKSIZE) --CONF=$(CONF) --RFTYPE=$(RF) ;; \
-	esac
+	fusesoc run --target=$(ARCH)_ref --build --work-root=$(WORK_DIR_SOC)/$* fsoc --CHUNKSIZE=$(CHUNKSIZE) --CONF=$(CONF) --RFTYPE=$(RF)
 
 # param: <ARCH>-<CHUNKSIZE>-<CONF>-<RFTYPE>
-# TODO: Use Edalize reporting instead of custom scripts
-_report.soc.%: _impl.soc.%
+report.soc.%: impl.soc.%
 	@echo -e "${GREEN}Report for $*...${RESET}"
 	$(eval ARCH=$(word 1,$(subst -, ,$*)))
-	mkdir -p $(SUMMARY_DIR_SOC)
-	@case ${ARCH} in \
-		xilinx) \
-			$(WORKFLOW_SCRIPT)/report_vivado_util.sh $(WORK_DIR_SOC)/$*/*.runs/impl_1/fsoc_utilization_placed.rpt > $(SUMMARY_DIR_SOC)/summary_util_$*; \
-			$(WORKFLOW_SCRIPT)/report_vivado_timing.sh $(WORK_DIR_SOC)/$*/*.runs/impl_1/fsoc_timing_summary_routed.rpt > $(SUMMARY_DIR_SOC)/summary_wns_$*; \
-			$(WORKFLOW_SCRIPT)/report_vivado_timing_to_fmax.sh $(SUMMARY_DIR_SOC) 100 \
-			;; \
-		gatemate) \
-			$(WORKFLOW_SCRIPT)/report_gatemate_util.sh $(WORK_DIR_SOC)/$*/gm_pr_$*.log > $(SUMMARY_DIR_SOC)/summary_util_$*; \
-			$(WORKFLOW_SCRIPT)/report_gatemate_timing.sh $(WORK_DIR_SOC)/$*/gm_pr_$*.log  > $(SUMMARY_DIR_SOC)/summary_fmax_$*; \
-			;; \
-		*) \
-			$(WORKFLOW_SCRIPT)/report_yosys_$(ARCH).sh $(WORK_DIR_SOC)/$*/yosys.log > $(SUMMARY_DIR_SOC)/summary_yosys_$*; \
-			$(WORKFLOW_SCRIPT)/report_nextpnr_timing.sh $(WORK_DIR_SOC)/$*/next.log > $(SUMMARY_DIR_SOC)/summary_fmax_$*; \
-			$(WORKFLOW_SCRIPT)/report_nextpnr_util.sh $(WORK_DIR_SOC)/$*/next.log > $(SUMMARY_DIR_SOC)/summary_util_$*; \
-			;; \
-	esac
+	$(PYTHON) $(SCRIPT)/reporting.py $(ARCH) $(WORK_DIR_SOC)/$* -o $(SUMMARY_DIR_SOC)/$*.json
 
 # param: set TARGET_ARCH
-report.soc.all: $(addprefix _report.soc.$(TARGET_ARCH)-, $(SYNTH_PARAMS))
-	$(PYTHON) $(WORKFLOW_SCRIPT)/summary_table.py $(SUMMARY_DIR_SOC) $(TARGET_ARCH)
+summary.soc.all: $(addprefix report.soc.$(TARGET_ARCH)-, $(SYNTH_PARAMS))
+	$(PYTHON) $(SCRIPT)/summary.py $(SUMMARY_DIR_SOC) -o $(WORK_DIR_MAIN)/soc_$(TARGET_ARCH).md
 
-report.md:
-	$(PYTHON) $(WORKFLOW_SCRIPT)/summary_table_md.py $(SUMMARY_DIR_SOC) $(TARGET_ARCH)
 
 #######################
 # Track and plot sizes
 #
 
 # param: <ARCH>-<CHUNKSIZE>-<CONF>-<RF>
-_track.sizes.synth.%: $(SRC_DESIGN) $(SRC_SYNTH)
+_track.sizes.impl.%:
 	@echo -e "${BLUE}Synthesizing for $*...${RESET}"
 	$(eval ARCH=$(word 1,$(subst -, ,$*)))
 	$(eval CHUNKSIZE=$(word 2,$(subst -, ,$*)))
 	$(eval CONF=$(word 3,$(subst -, ,$*)))
 	$(eval RF=$(word 4,$(subst -, ,$*)))
-	@echo "CHUNKSIZE: $(CHUNKSIZE)"
-	@echo "ARCH: $(ARCH)"
-	@echo "CONF: $(CONF)"
-	@echo "RF: $(RF)"
-	mkdir -p $(WORK_DIR_CORE)/$*
-	mkdir -p $(WORK_DIR_SOC)/$*
-	$(YOSYS) -q -l $(WORK_DIR_CORE)/$*/yosys_$*.log -p "read_verilog -sv -defer $^; chparam -set CHUNKSIZE $(CHUNKSIZE) $(TOP_MODULE_CORE); chparam -set CONF \"$(CONF)\" $(TOP_MODULE_CORE); chparam -set RFTYPE \"$(RF)\" $(TOP_MODULE_CORE); synth_$(ARCH) -top $(TOP_MODULE_CORE)"
-	$(YOSYS) -q -l $(WORK_DIR_SOC)/$*/yosys_$*.log -p "read_verilog -sv -defer $^; chparam -set CHUNKSIZE $(CHUNKSIZE) $(TOP_MODULE_SOC); chparam -set CONF \"$(CONF)\" $(TOP_MODULE_SOC); chparam -set RFTYPE \"$(RF)\" $(TOP_MODULE_SOC); synth_$(ARCH) -top $(TOP_MODULE_SOC)"
-	mkdir -p $(SUMMARY_DIR_CORE)
-	mkdir -p $(SUMMARY_DIR_SOC)
-	$(WORKFLOW_SCRIPT)/report_yosys_$(ARCH).sh $(WORK_DIR_CORE)/$*/yosys_$*.log > $(SUMMARY_DIR_CORE)/summary_yosys_$*
-	$(WORKFLOW_SCRIPT)/report_yosys_$(ARCH).sh $(WORK_DIR_SOC)/$*/yosys_$*.log > $(SUMMARY_DIR_SOC)/summary_yosys_$*
-
-
-track.sizes.synth: $(addprefix _track.sizes.synth.$(TARGET_ARCH)-, $(PLOT_PARAMS))
-	$(PYTHON) $(WORKFLOW_SCRIPT)/plot_track_sizes.py $(SUMMARY_DIR_CORE) $(SUMMARY_DIR_SOC) ./doc/area.svg ./doc/area.txt $(COMMIT)
+	fusesoc run --target=$(ARCH)_ref --build --work-root=$(WORK_DIR_CORE)/$* fazyrv --CHUNKSIZE=$(CHUNKSIZE) --CONF=$(CONF) --RFTYPE=$(RF)
+	$(PYTHON) $(SCRIPT)/reporting.py $(ARCH) $(WORK_DIR_CORE)/$* -o $(SUMMARY_DIR_CORE)/$*.json
+	$(PYTHON) $(SCRIPT)/summary.py $(SUMMARY_DIR_CORE) -o $(SUMMARY_DIR_CORE)/core_ice40.md
+	make report.soc.$(ARCH)-$(CHUNKSIZE)-$(CONF)-$(RF)	
+
+track.sizes: $(addprefix _track.sizes.impl.ice40-, $(PLOT_PARAMS))
+	$(PYTHON) $(SCRIPT)/plot_track_sizes.py ice40 $(SUMMARY_DIR_CORE) $(SUMMARY_DIR_SOC) --svg ./doc/area.svg --ascii ./doc/area.txt --commit_hash $(COMMIT)
 
 clean:
 	rm -vrf $(WORK_DIR_MAIN)

README.md

@@ -126,16 +126,18 @@ ARCH        := ice40 | ecp5 | gowin | xilinx | gatemate
 
 ```shell
 # run the flow only
-make _impl.soc.<ARCH>-<CHUNKSIZE>-<CONF>-<RFTYPE>
+make impl.soc.<ARCH>-<CHUNKSIZE>-<CONF>-<RFTYPE>
 
 # run the flow and report a summary of the results
-make _report.soc.<ARCH>-<CHUNKSIZE>-<CONF>-<RFTYPE>
+make report.soc.<ARCH>-<CHUNKSIZE>-<CONF>-<RFTYPE>
 
 # e.g.,
-make _report.soc.ice40-8-MIN-BRAM
+make report.soc.ice40-8-MIN-BRAM
 
-# or 
-make report.soc.all
+# Make a markdown summary of all configurations
+# given an architecture
+# pip install -r requirements.txt
+TARGET_ARCH=ice40 make summary.soc.all
 ```
 
 ### Litex
@@ -256,16 +258,16 @@ Please cite the work as follows:
 
 ```
 @inproceedings{fazyrv2024kissich,
-  title = {{FazyRV: Closing the Gap between 32-Bit and Bit-Serial RISC-V Cores with a Scalable Implementation}},
+  title     = {{FazyRV: Closing the Gap between 32-Bit and Bit-Serial RISC-V Cores with a Scalable Implementation}},
   booktitle = {Proc. of the 21st ACM International Conference on Computing Frontiers (CF ’24)},
-  author = {Kissich, Meinhard and Baunach, Marcel},
-  year = {2024},
-  month = {May},
+  author    = {Kissich, Meinhard and Baunach, Marcel},
+  year      = {2024},
+  month     = {May},
   publisher = {Association for Computing Machinery},
-  url = {https://doi.org/10.1145/3649153.3649195},
-  doi = {10.1145/3649153.3649195},
+  url       = {https://doi.org/10.1145/3649153.3649195},
+  doi       = {10.1145/3649153.3649195},
   booktitle = {Proceedings of the 21st ACM International Conference on Computing Frontiers},
-  pages = {240–248}
+  pages     = {240–248}
 }
 ```
 
@@ -277,22 +279,11 @@ Please cite the work as follows:
 
 * YosysHQ invited us to contribute a blog post. Check out [our FazyRV community-spotlight blog post](https://blog.yosyshq.com/p/community-spotlight-fazyrv) and all the [amazing open-source projects](https://blog.yosyshq.com).
 
+* [heichips25-fazyrv-exotiny](https://github.com/meiniKi/heichips25-fazyrv-exotiny) implements a FazyRV-based SoC as part of the [HeiChips 2025 Tapeout](https://github.com/FPGA-Research/heichips25-tapeout).
 
+* [gf180mcu FazyRV Hachure SoC](https://github.com/meiniKi/gf180mcu-fazyrv-hachure) integrates several FazyRV instances.
 
 
-## TODOs
-
-- [ ] Workflow: caching, tool versions, artifacts, dependence on some local tools
-- [ ] RVC extension (compressed instructions)
-- [ ] INT variant
-- [ ] CSR variant
-- [ ] CSR instructions in addition to `csrrw`(?)
-- [ ] Use edalize reporting instead of custom scripts
-- [ ] Optimization
-- [ ] More documentation
-
-Please feel free to discuss and open an issue and/or pull request.
-
 ## Licensing
 
 The FazyRV core (`rtl/*`) is licensed under the MIT license. This license may _not_ apply to the remainder of the repository.