Hardwire x0 as bram regs are not initialized in asic synthesis #58
verif.yml
on: push
Run rvtests
2m 46s
Run RISCOF tests
13m 55s
Cover insn checks
7m 30s
Cover reg checks
33s
BMC insn checks
26m 47s
BMC reg checks
2m 18s
Annotations
1 error
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Run RISCOF tests
Process completed with exit code 2.
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