Skip to content

Improving Verilog support in FUGen and adding RFGen #16

Improving Verilog support in FUGen and adding RFGen

Improving Verilog support in FUGen and adding RFGen #16

Triggered via pull request March 26, 2025 12:24
Status Success
Total duration 2h 37m 52s
Artifacts

ci.yml

on: pull_request
Fit to window
Zoom out
Zoom in