From ff8e3a609c1e3cbe6d3dcf6412ed7741b809e033 Mon Sep 17 00:00:00 2001 From: moontwister Date: Thu, 28 May 2026 11:59:37 +0200 Subject: [PATCH 1/3] hisilicon-osdrv-hi3516cv200: fix OV2735 .ini for MIPI MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Four wrong fields in cv200's ov2735_i2c_1080p.ini that prevent it from working as MIPI on real hardware. Verified end-to-end against OpenIPC/majestic master+bcf6700 with its new SET_DEV_ATTR diagnostic log (see https://github.com/OpenIPC/majestic/issues/278). [mode] input_mode = 4 → 0 (INPUT_MODE_MIPI = 0; 4 is unused) [mipi] data_type = 3 → 2 (OV2735 outputs RAW10, not RAW12) [mipi] lane_id = "0|1|2|3|..." → "0|1|-1|-1|..." (2-lane, not 4) [vi_dev] Input_mod = 2 → 5 (MIPI; 2 is VI_INPUT_MODE_DIGITAL_CAMERA, rejected by majestic's new MIPI mode check) Verified on TP-Link Kasa KC110 (Hi3518EV200 + OV2735 2-lane RAW10). With these four fields fixed, /proc/driver/hi_mipi shows the expected `LaneNum=2 RAW10 MIPI` (matches the vendor firmware diagnostic snapshot), ISP IRQs climb, VENC produces frames, RTSP delivers H.264 1080p with no LD_PRELOAD shim. cv300's already- correct ov2735_i2c_1080p.ini has the same MIPI fields (input_mode, data_type, lane_id) as this patch. Co-Authored-By: Claude Opus 4.7 --- .../files/sensor/config/ov2735_i2c_1080p.ini | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_i2c_1080p.ini b/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_i2c_1080p.ini index 7daf93a63a..2427cd0f0b 100644 --- a/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_i2c_1080p.ini +++ b/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_i2c_1080p.ini @@ -9,7 +9,7 @@ DllFile =/usr/lib/sensors/libsns_ov2735.so ;sensor lib path [mode] -input_mode = 4 ;INPUT_MODE_MIPI = 0 +input_mode = 0 ;INPUT_MODE_MIPI = 0 ;INPUT_MODE_SUBLVDS = 1 ;INPUT_MODE_LVDS = 2 ...etc @@ -19,12 +19,12 @@ dev_attr = 0 ;mipi_dev_attr_t = 0 [mipi] ;----------only for mipi_dev--------- -data_type = 3 ;raw data type: 8/10/12/14 bit +data_type = 2 ;raw data type: 8/10/12/14 bit ;RAW_DATA_8BIT = 1 ;RAW_DATA_10BIT = 2 ;RAW_DATA_12BIT = 3 ;RAW_DATA_14BIT = 4 -lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable +lane_id = 0|1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable [lvds] ;----------only for lvds_dev--------- @@ -67,7 +67,7 @@ Isp_Bayer =3 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3 [vi_dev] -Input_mod =2 ;VI_INPUT_MODE_BT656 = 0 +Input_mod =5 ;VI_INPUT_MODE_BT656 = 0 ;VI_INPUT_MODE_BT601, ;VI_INPUT_MODE_DIGITAL_CAMERA Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0 From 78b9cb7d870a0e4fb2fb2ebf46e41dcd2407be31 Mon Sep 17 00:00:00 2001 From: moontwister Date: Thu, 11 Jun 2026 22:35:59 +0200 Subject: [PATCH 2/3] hisilicon-osdrv-hi3516cv200: fix OV2735 .ini VI component mask MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fifth wrong field in cv200's ov2735_i2c_1080p.ini, found while chasing the colour cast reported in OpenIPC/majestic#281: [vi_dev] Mask_0 = 0x3FF0000 → 0xFFF00000 0xFFF00000 matches cv300's already-correct ov2735_i2c_1080p.ini and the vendor firmware's VI DEV ATTR on the same hardware (TP-Link Kasa KC110, Hi3518EV200 + OV2735 2-lane MIPI RAW10). With 0x3FF0000 the VI captures the wrong bit window of the ISP bus: AE converges ~28x under (Line 86 vs 2431 at the same scene) and the image gets a severe colour cast with value wrap in highlights. Verified on the KC110 against majestic master+e9ff50d: changing only this field (same binary, same scene) restores /proc/umap/vi ComMsk0=0xFFF00000, correct AE convergence, and a clean image. This was masked in earlier testing by an LD_PRELOAD shim that forced the vendor VI dev attr — majestic itself applies the .ini faithfully, so the majestic side of OpenIPC/majestic#281 is innocent; the .ini was wrong. Co-Authored-By: Claude Fable 5 --- .../files/sensor/config/ov2735_i2c_1080p.ini | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_i2c_1080p.ini b/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_i2c_1080p.ini index 2427cd0f0b..8539f2e62b 100644 --- a/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_i2c_1080p.ini +++ b/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_i2c_1080p.ini @@ -83,7 +83,7 @@ Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge) ;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */ ;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */ Mask_num =2 ;Component mask -Mask_0 =0x3FF0000 +Mask_0 =0xFFF00000 Mask_1 =0x0 Scan_mode = 1;VI_SCAN_INTERLACED = 0 ;VI_SCAN_PROGRESSIVE, From 58db64c96aa88d5f6556f391da6ad251319f2ad9 Mon Sep 17 00:00:00 2001 From: moontwister Date: Sat, 13 Jun 2026 20:25:16 +0200 Subject: [PATCH 3/3] hisilicon-osdrv-hi3516cv200: split OV2735 MIPI fix into a separate .ini Per review feedback on #2155: instead of changing the in-tree ov2735_i2c_1080p.ini (which an existing parallel/DVP installation may rely on), ship the MIPI/CSI-2 config as a new ov2735_mipi_1080p.ini, mirroring the existing ov2710_mipi_1080p.ini / ov2710_dc_1080p.ini split. ov2735_i2c_1080p.ini is restored byte-for-byte to its original values. The new ov2735_mipi_1080p.ini carries the four MIPI fields plus the VI component mask from the previous two commits: [mode] input_mode = 0 (INPUT_MODE_MIPI) [mipi] data_type = 2 (RAW10) [mipi] lane_id = 0|1|-1|... (2-lane) [vi_dev] Input_mod = 5 (MIPI) [vi_dev] Mask_0 = 0xFFF00000 (VI component mask) Verified on a TP-Link Kasa KC110 (Hi3518EV200 + OV2735, 2-lane MIPI RAW10) against majestic master: LaneNum=2 RAW10 MIPI, correct AE, clean image, no LD_PRELOAD shim. Matches cv300's MIPI OV2735 values. load_hisilicon keys its pinmux case on $SENSOR (U-Boot env "ov2735"), not on the .ini filename, so no script change is needed; boards select this config via isp.sensorConfig. Co-Authored-By: Claude Opus 4.8 --- .../files/sensor/config/ov2735_i2c_1080p.ini | 10 +- .../files/sensor/config/ov2735_mipi_1080p.ini | 283 ++++++++++++++++++ 2 files changed, 288 insertions(+), 5 deletions(-) create mode 100644 general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_mipi_1080p.ini diff --git a/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_i2c_1080p.ini b/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_i2c_1080p.ini index 8539f2e62b..7daf93a63a 100644 --- a/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_i2c_1080p.ini +++ b/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_i2c_1080p.ini @@ -9,7 +9,7 @@ DllFile =/usr/lib/sensors/libsns_ov2735.so ;sensor lib path [mode] -input_mode = 0 ;INPUT_MODE_MIPI = 0 +input_mode = 4 ;INPUT_MODE_MIPI = 0 ;INPUT_MODE_SUBLVDS = 1 ;INPUT_MODE_LVDS = 2 ...etc @@ -19,12 +19,12 @@ dev_attr = 0 ;mipi_dev_attr_t = 0 [mipi] ;----------only for mipi_dev--------- -data_type = 2 ;raw data type: 8/10/12/14 bit +data_type = 3 ;raw data type: 8/10/12/14 bit ;RAW_DATA_8BIT = 1 ;RAW_DATA_10BIT = 2 ;RAW_DATA_12BIT = 3 ;RAW_DATA_14BIT = 4 -lane_id = 0|1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable +lane_id = 0|1|2|3|-1|-1|-1|-1| ;lane_id: -1 - disable [lvds] ;----------only for lvds_dev--------- @@ -67,7 +67,7 @@ Isp_Bayer =3 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3 [vi_dev] -Input_mod =5 ;VI_INPUT_MODE_BT656 = 0 +Input_mod =2 ;VI_INPUT_MODE_BT656 = 0 ;VI_INPUT_MODE_BT601, ;VI_INPUT_MODE_DIGITAL_CAMERA Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0 @@ -83,7 +83,7 @@ Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge) ;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */ ;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */ Mask_num =2 ;Component mask -Mask_0 =0xFFF00000 +Mask_0 =0x3FF0000 Mask_1 =0x0 Scan_mode = 1;VI_SCAN_INTERLACED = 0 ;VI_SCAN_PROGRESSIVE, diff --git a/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_mipi_1080p.ini b/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_mipi_1080p.ini new file mode 100644 index 0000000000..d381bfb508 --- /dev/null +++ b/general/package/hisilicon-osdrv-hi3516cv200/files/sensor/config/ov2735_mipi_1080p.ini @@ -0,0 +1,283 @@ +; OV2735 1080p - MIPI (CSI-2) variant, 2-lane RAW10. +; Select with: cli -s .isp.sensorConfig /etc/sensors/ov2735_mipi_1080p.ini +; Kept separate from ov2735_i2c_1080p.ini so that the existing config is untouched. +; +[sensor] +Sensor_type =ov2735 ;sensor name +Mode =0 ;WDR_MODE_NONE = 0 + ;WDR_MODE_BUILT_IN = 1 + ;WDR_MODE_2To1_LINE = 2 + ;WDR_MODE_2To1_FRAME = 3 + ;WDR_MODE_2To1_FRAME_FULL_RATE =4 ...etc +DllFile =/usr/lib/sensors/libsns_ov2735.so ;sensor lib path + + +[mode] +input_mode = 0 ;INPUT_MODE_MIPI = 0 + ;INPUT_MODE_SUBLVDS = 1 + ;INPUT_MODE_LVDS = 2 ...etc + +dev_attr = 0 ;mipi_dev_attr_t = 0 + ;lvds_dev_attr_t = 1 + ;NULL =2 + +[mipi] +;----------only for mipi_dev--------- +data_type = 2 ;raw data type: 8/10/12/14 bit + ;RAW_DATA_8BIT = 1 + ;RAW_DATA_10BIT = 2 + ;RAW_DATA_12BIT = 3 + ;RAW_DATA_14BIT = 4 +lane_id = 0|1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable + +[lvds] +;----------only for lvds_dev--------- +img_size_w = -1 ;oringnal sensor input image size W +img_size_h = -1 ;oringnal sensor input image size H +wdr_mode = -1 ;HI_WDR_MODE_NONE =0 + ;HI_WDR_MODE_2F = 1 + ;HI_WDR_MODE_3F = 2 + ;HI_WDR_MODE_4F =3 +sync_mode = -1 ;LVDS_SYNC_MODE_SOL = 0 + ;LVDS_SYNC_MODE_SAV = 1 +raw_data_type = -1 ;RAW_DATA_8BIT = 0 + ;RAW_DATA_10BIT = 1 + ;RAW_DATA_12BIT = 2 + ;RAW_DATA_14BIT = 3 +data_endian = -1 ;LVDS_ENDIAN_LITTLE = 0 + ;LVDS_ENDIAN_BIG = 1 +sync_code_endian =-1 ;LVDS_ENDIAN_LITTLE = 0 + ;LVDS_ENDIAN_BIG = 1 +lane_id = -1|-1|-1|-1|-1|-1|-1|-1| ;lane_id: -1 - disable +lvds_lane_num = -1 ;LVDS_LANE_NUM +wdr_vc_num = -1 ;WDR_VC_NUM +sync_code_num = -1 ;SYNC_CODE_NUM +sync_code_0 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1| +sync_code_1 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1| +sync_code_2 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1| +sync_code_3 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1| +sync_code_4 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1| +sync_code_5 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1| +sync_code_6 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1| +sync_code_7 = -1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1|-1| + +[isp_image] +Isp_x =0 +Isp_y =0 +Isp_W =1920 +Isp_H =1080 +Isp_FrameRate=25 +Isp_Bayer =3 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3 + + +[vi_dev] +Input_mod =5 ;VI_INPUT_MODE_BT656 = 0 + ;VI_INPUT_MODE_BT601, + ;VI_INPUT_MODE_DIGITAL_CAMERA +Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0 + ;VI_WORK_MODE_2Multiplex, + ;VI_WORK_MODE_4Multiplex +Combine_mode =0 ;Y/C composite or separation mode + ;VI_COMBINE_COMPOSITE = 0 /*Composite mode */ + ;VI_COMBINE_SEPARATE, /*Separate mode */ +Comp_mode =0 ;Component mode (single-component or dual-component) + ;VI_COMP_MODE_SINGLE = 0, /*single component mode */ + ;VI_COMP_MODE_DOUBLE = 1, /*double component mode */ +Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge) + ;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */ + ;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */ +Mask_num =2 ;Component mask +Mask_0 =0xFFF00000 +Mask_1 =0x0 +Scan_mode = 1;VI_SCAN_INTERLACED = 0 + ;VI_SCAN_PROGRESSIVE, +Data_seq =2 ;data sequence (ONLY for YUV format) + ;----2th component U/V sequence in bt1120 + ; VI_INPUT_DATA_VUVU = 0, + ; VI_INPUT_DATA_UVUV, + ;----input sequence for yuv + ; VI_INPUT_DATA_UYVY = 0, + ; VI_INPUT_DATA_VYUY, + ; VI_INPUT_DATA_YUYV, + ; VI_INPUT_DATA_YVYU + +Vsync =0 ; vertical synchronization signal + ;VI_VSYNC_FIELD = 0, + ;VI_VSYNC_PULSE, +VsyncNeg=0 ;Polarity of the vertical synchronization signal + ;VI_VSYNC_NEG_HIGH = 0, + ;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E +Hsync =0 ;Attribute of the horizontal synchronization signal + ;VI_HSYNC_VALID_SINGNAL = 0, + ;VI_HSYNC_PULSE, +HsyncNeg =0 ;Polarity of the horizontal synchronization signal + ;VI_HSYNC_NEG_HIGH = 0, + ;VI_HSYNC_NEG_LOW +VsyncValid =1 ;Attribute of the valid vertical synchronization signal + ;VI_VSYNC_NORM_PULSE = 0, + ;VI_VSYNC_VALID_SINGAL, +VsyncValidNeg =0;Polarity of the valid vertical synchronization signal + ;VI_VSYNC_VALID_NEG_HIGH = 0, + ;VI_VSYNC_VALID_NEG_LOW +Timingblank_HsyncHfb =0 ;Horizontal front blanking width +Timingblank_HsyncAct =1920 ;Horizontal effetive width +Timingblank_HsyncHbb =0 ;Horizontal back blanking width +Timingblank_VsyncVfb =0 ;Vertical front blanking height +Timingblank_VsyncVact =1080 ;Vertical effetive width +Timingblank_VsyncVbb=0 ;Vertical back blanking height +Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive) +Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive) +Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive) + +;----- only for bt656 ---------- +FixCode =0 ;BT656_FIXCODE_1 = 0, + ;BT656_FIXCODE_0 +FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0 + ;BT656_FIELD_POLAR_NSTD +DataPath =1 ;ISP enable or bypass + ;VI_PATH_BYPASS = 0,/* ISP bypass */ + ;VI_PATH_ISP = 1,/* ISP enable */ + ;VI_PATH_RAW = 2,/* Capture raw data, for debug */ +InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1, +DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1 +DevRect_x=0 ; +DevRect_y=0 ; +DevRect_w=1920 ; +DevRect_h=1080 ; + +[vi_chn] +CapRect_X =0 +CapRect_Y =0 +CapRect_Width=1920 +CapRect_Height=1080 +DestSize_Width=1920 +DestSize_Height=1080 +CapSel =2 ;Frame/field select. ONLY used in interlaced mode + ;VI_CAPSEL_TOP = 0, /* top field */ + ;VI_CAPSEL_BOTTOM, /* bottom field */ + ;VI_CAPSEL_BOTH, /* top and bottom field */ + +PixFormat =23;PIXEL_FORMAT_YUV_SEMIPLANAR_422 = 22 + ;PIXEL_FORMAT_YUV_SEMIPLANAR_420 = 23 ...etc +CompressMode =0 ;COMPRESS_MODE_NONE = 0 + ;COMPRESS_MODE_SEG =1 ...etc + +SrcFrameRate=-1 ;Source frame rate. -1: not controll +FrameRate =-1 ;Target frame rate. -1: not controll +[wdr] +;only for wdr mode +Compress =FALSE ;WDR Compress. FALSE = 0; TRUE = 1 + +[vpss_group] +Vpss_DciEn =FALSE +Vpss_IeEn =FALSE +Vpss_NrEn =TRUE +Vpss_HistEn =FALSE +Vpss_DieMode=1 ;Define de-interlace mode + ;VPSS_DIE_MODE_AUTO = 0, + ;VPSS_DIE_MODE_NODIE = 1, + ;VPSS_DIE_MODE_DIE = 2, + +[vpss_corp] +Crop_enable =FALSE +Coordinate =1 ;VPSS_CROP_RATIO_COOR = 0, /*Ratio coordinate*/ + ;VPSS_CROP_ABS_COOR = 1 /*Absolute coordinate*/ +Crop_X =128 +Crop_Y =128 +Crop_W =1664 +Crop_H =824 + +[vpss_chn] +Vpss_W =1920 +Vpss_H =1080 +CompressMode=0 ;COMPRESS_MODE_NONE = 0 + ;COMPRESS_MODE_SEG =1 ...etc +Mirror =FALSE;Whether to mirror +Flip =TRUE;Whether to flip + +[vb_conf] +VbCnt=10 +vbTimes=15 ;when raw=8bit vbTimes = 10 + ;when raw=10/12 bit vbTimes = 15 + ;when raw=14/16 bit vbTimes = 20 +[venc_comm] +venc_chn =1 ;create venc chn number;(0,2] +BufCnt = 1 ;network meida-trans bufcnt + +[venc_0] +PicWidth =1920 +PicHeight =1080 +Profile =2 +RcMode =VENC_RC_MODE_H264CBR + +Gop =50 +StatTime =2 +ViFrmRate =25 +TargetFrmRate=25 +;----- only for VENC_RC_MODE_H264CBR ---------- +BitRate=4096 +FluctuateLevel=0 +;----- only for VENC_RC_MODE_H264VBR ---------- +MaxBitRate =10000 + +MaxQp=32 +MinQp=24 +;----- only for VENC_RC_MODE_H264FIXQP ---------- +IQp=45 + +PQp=40 +;-------- for REF_EX IsliceEnable------ +IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion +IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective +RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang +ReqIQp = 30 +;-------- for REF_EX ViEnable------ +ViEnable = TRUE +ViInterval = 50 ; 2s +ViQpDelta = 2 + +[venc_1] +PicWidth =1920 +PicHeight =1080 +Profile =2 +RcMode =VENC_RC_MODE_H264CBR + +Gop =50 +StatTime =2 +ViFrmRate =25 +TargetFrmRate=25 +;----- only for VENC_RC_MODE_H264CBR ---------- +BitRate=4096 +FluctuateLevel=0 +;----- only for VENC_RC_MODE_H264VBR ---------- +MaxBitRate =10000 + +MaxQp=32 + +MinQp=24 +;----- only for VENC_RC_MODE_H264FIXQP ---------- +IQp=40 + +PQp=45 +;-------- for REF_EX IsliceEnable------ +IsliceEnable = FALSE ;IsliceEnable and ViEnable is mutual exclusion +IsRefreshEnable = FALSE ;IsliceEnable and bRefreshEnable both TRUE is effective +RefreshLineNum = 12 ;PicHeight/16/6 6 is empirical value,ask Fuyang +ReqIQp = 30 +;-------- for REF_EX ViEnable------ +ViEnable = TRUE +ViInterval = 50 ; 2s +ViQpDelta = 2 + +[bind] +ViDev =0 +ViChn =0 +VpssGrp =0 +VpssChn = 0 +VoDev =0 +VoChn =0 +ViSnapChn =0 +VpssSnapGrp=0 +VpssSnapChn=1 +VencSnapGrp=1 +VencSnapChn=3